Services

RTL Design

Well-structured and easy-to-understand RTL design in VHDL or Verilog with carefully selected signal names and sufficient inline commenting to minimize the risk of errors going unnoticed.

IO, clock generation, reset, and clock domain crossings (CDC) are carefully designed and constrained.

Initial synthesis is considered an integral part of any RTL design, as it reveals any structural and performance issues in the RTL. 

Verification

Regression verification is essential in the process towards a working product. Verification targets functional behavior as well as stress  and performance.

Verification is mainly based on simulation, as debugging is faster in simulation. In FPGA designs however, selected parts of the verification can be done in HW to save runtime.

As verification can consume a major part of the design time, it is important to align the effort with the project objectives. 

Physical Design

 Tasks like device configuration, floor-planning, IO assignment, constraints, synthesis, routing, and timing analysis (STA).

Execution and analysis of the generated reports are scripted to facilitate a simple re-run of the flow.

I am experienced with FPGA devices and tool flow from both Intel (Altera) and AMD (Xilinx). 

HW Architecture

Good interface specifications, re-usability, simplicity, and testability are some of the goals for creating a high-quality product.

I have extensive expertise in device and system architecture as well as micro-architecture.

Laboratory Bring-up & Test

In the bring-up phase, software, hardware, and the FPGA binary come together for the first time. Any issues need to be identified and resolved.

Often, debugging through simple software access to device registers on the board and the FPGA will be sufficient. Sometimes however, an inspection of interfaces and signals with an oscilloscope and logic analyzer may be required.

Establishment of Design Flow 

Are you already engaged in FPGA design but wish to improve your process? Do you want your FPGA implementation to be smooth and repeatable?

I can help you establish an appropriate design flow for your needs and ambitions. 

Specification

A clear and unambiguous specification is the foundation for a successful design and implementation. Drawings and context descriptions improve the quality of work for everyone involved in the process. 

Debug & Root Cause Analysis

Issues arise both before and after production releases, so it is essential that you can debug and get to the root cause of issues quickly.

I can help with this with my good system understanding, outstanding analytical skills, curiosity, and persistency. I strive to find the root cause quickly and efficiently through team collaboration and structured analysis. 

Review

I can conduct or participate in reviews of specifications, RTL, PCBs, verification and test plans, timing constraints, and documentation. 

Technical Leadership

I can assist you in steering your FPGA design through all disciplines and phases. 

This includes ensuring that the technical side of the project is aligned with requirements, that the implementation and verification is adequate to your needs, and your project ambitions match your resources and deadlines. 

Technical Liaison

In projects involving partners and sub-contractors or projects spanning many teams, a huge effort is needed in coordination and technical alignment.

A successful effort requires technical insight, careful communication, strong relations, and an awareness of cultural differences.

Technical Documentation

I can deliver design and usage/user documentation in English or Danish with a quality and comprehension level aligned with needs.

Documentation can be in Microsoft Word or mark-up language.

Examples of documentation are design documentation, architecture specification, user manuals, 'how-to' guides, technical notes, application notes etc.